shader_recompiler: Only forward declared number of vertex inputs.

Author: squidbus

src/shader_recompiler/backend/spirv/emit_spirv_quad_rect.cpp

@@ -12,8 +12,8 @@ using Sirit::Id;
 constexpr u32 SPIRV_VERSION_1_5 = 0x00010500;
 
 struct QuadRectListEmitter : public Sirit::Module {
-    explicit QuadRectListEmitter(const FragmentRuntimeInfo& fs_info_)
-        : Sirit::Module{SPIRV_VERSION_1_5}, fs_info{fs_info_} {
+    explicit QuadRectListEmitter(const VertexRuntimeInfo& vs_info_, const FragmentRuntimeInfo& fs_info_)
+        : Sirit::Module{SPIRV_VERSION_1_5}, vs_info{vs_info_}, fs_info{fs_info_} {
         void_id = TypeVoid();
         bool_id = TypeBool();
         float_id = TypeFloat(32);
@@ -252,8 +252,9 @@ struct QuadRectListEmitter : public Sirit::Module {
         } else {
             gl_per_vertex = AddOutput(gl_per_vertex_type);
         }
-        outputs.reserve(fs_info.num_inputs);
-        for (int i = 0; i < fs_info.num_inputs; i++) {
+        const auto num_forwards = std::min(vs_info.num_exports, fs_info.num_inputs);
+        outputs.reserve(num_forwards);
+        for (int i = 0; i < num_forwards; i++) {
             const auto& input = fs_info.inputs[i];
             if (input.IsDefault()) {
                 continue;
@@ -276,8 +277,10 @@ struct QuadRectListEmitter : public Sirit::Module {
         const Id gl_per_vertex_array{TypeArray(gl_per_vertex_type, Constant(uint_id, 32U))};
         gl_in = AddInput(gl_per_vertex_array);
         const Id float_arr{TypeArray(vec4_id, Int(32))};
-        inputs.reserve(fs_info.num_inputs);
-        for (int i = 0; i < fs_info.num_inputs; i++) {
+
+        const auto num_forwards = std::min(vs_info.num_exports, fs_info.num_inputs);
+        inputs.reserve(num_forwards);
+        for (int i = 0; i < num_forwards; i++) {
             const auto& input = fs_info.inputs[i];
             if (input.IsDefault()) {
                 continue;
@@ -288,6 +291,7 @@ struct QuadRectListEmitter : public Sirit::Module {
     }
 
 private:
+    VertexRuntimeInfo vs_info;
     FragmentRuntimeInfo fs_info;
     Id main;
     Id void_id;
@@ -319,8 +323,10 @@ struct QuadRectListEmitter : public Sirit::Module {
     std::vector<Id> interfaces;
 };
 
-std::vector<u32> EmitAuxilaryTessShader(AuxShaderType type, const FragmentRuntimeInfo& fs_info) {
-    QuadRectListEmitter ctx{fs_info};
+std::vector<u32> EmitAuxilaryTessShader(AuxShaderType type,
+                                        const VertexRuntimeInfo& vs_info,
+                                        const FragmentRuntimeInfo& fs_info) {
+    QuadRectListEmitter ctx{vs_info, fs_info};
     switch (type) {
     case AuxShaderType::RectListTCS:
         ctx.EmitRectListTCS();

src/shader_recompiler/backend/spirv/emit_spirv_quad_rect.h

@@ -8,6 +8,7 @@
 
 namespace Shader {
 struct FragmentRuntimeInfo;
+struct VertexRuntimeInfo;
 }
 
 namespace Shader::Backend::SPIRV {
@@ -19,6 +20,7 @@ enum class AuxShaderType : u32 {
 };
 
 [[nodiscard]] std::vector<u32> EmitAuxilaryTessShader(AuxShaderType type,
+                                                      const VertexRuntimeInfo& vs_info,
                                                       const FragmentRuntimeInfo& fs_info);
 
 } // namespace Shader::Backend::SPIRV

src/shader_recompiler/runtime_info.h

@@ -81,6 +81,7 @@ using OutputMap = std::array<Output, 4>;
 
 struct VertexRuntimeInfo {
     u32 num_outputs;
+    u32 num_exports;
     std::array<OutputMap, 3> outputs;
     bool tess_emulated_primitive{};
     bool emulate_depth_negative_one_to_one{};

src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp

@@ -202,8 +202,9 @@ GraphicsPipeline::GraphicsPipeline(
     } else if (is_rect_list || is_quad_list) {
         const auto type = is_quad_list ? AuxShaderType::QuadListTCS : AuxShaderType::RectListTCS;
         if (!preloading) {
+            const auto& vs_info = runtime_infos[u32(Shader::LogicalStage::Vertex)].vs_info;
             const auto& fs_info = runtime_infos[u32(Shader::LogicalStage::Fragment)].fs_info;
-            sdata.tcs = Shader::Backend::SPIRV::EmitAuxilaryTessShader(type, fs_info);
+            sdata.tcs = Shader::Backend::SPIRV::EmitAuxilaryTessShader(type, vs_info, fs_info);
         }
         shader_stages.emplace_back(vk::PipelineShaderStageCreateInfo{
             .stage = vk::ShaderStageFlagBits::eTessellationControl,
@@ -220,9 +221,10 @@ GraphicsPipeline::GraphicsPipeline(
         });
     } else if (is_rect_list || is_quad_list) {
         if (!preloading) {
+            const auto& vs_info = runtime_infos[u32(Shader::LogicalStage::Vertex)].vs_info;
             const auto& fs_info = runtime_infos[u32(Shader::LogicalStage::Fragment)].fs_info;
             sdata.tes = Shader::Backend::SPIRV::EmitAuxilaryTessShader(
-                AuxShaderType::PassthroughTES, fs_info);
+                AuxShaderType::PassthroughTES, vs_info, fs_info);
         }
         shader_stages.emplace_back(vk::PipelineShaderStageCreateInfo{
             .stage = vk::ShaderStageFlagBits::eTessellationEvaluation,

src/video_core/renderer_vulkan/vk_pipeline_cache.cpp

@@ -127,6 +127,7 @@ const Shader::RuntimeInfo& PipelineCache::BuildRuntimeInfo(Stage stage, LogicalS
         info.vs_info.step_rate_0 = regs.vgt_instance_step_rate_0;
         info.vs_info.step_rate_1 = regs.vgt_instance_step_rate_1;
         info.vs_info.num_outputs = MapOutputs(info.vs_info.outputs, regs.vs_output_control);
+        info.vs_info.num_exports = regs.vs_output_config.NumExports();
         info.vs_info.emulate_depth_negative_one_to_one =
             !instance.IsDepthClipControlSupported() &&
             regs.clipper_control.clip_space == AmdGpu::ClipSpace::MinusWToW;